[llvm] 2cd13e8 - [Hexagon] Recognize "access size" for dcfetch

[Krzysztof Parzyszek via llvm-commits]

Author: Krzysztof Parzyszek
Date: 2022-03-02T12:57:51-08:00
New Revision: 2cd13e8b0000657dcba8f5fb178a4c4b143495bc

URL: https://github.com/llvm/llvm-project/commit/2cd13e8b0000657dcba8f5fb178a4c4b143495bc
DIFF: https://github.com/llvm/llvm-project/commit/2cd13e8b0000657dcba8f5fb178a4c4b143495bc.diff

LOG: [Hexagon] Recognize "access size" for dcfetch

Dcfetch doesn't really have an access size, but the immediate
offset is scaled as for an 8-byte access, so treat it as such.

Added: 
    

Modified: 
    llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
index 9b4e92a166639..2e80273060d07 100644
--- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
@@ -4464,6 +4464,9 @@ unsigned HexagonInstrInfo::getMemAccessSize(const MachineInstr &MI) const {
   unsigned Size = getMemAccessSizeInBytes(MemAccessSize(S));
   if (Size != 0)
     return Size;
+  // Y2_dcfetchbo is special
+  if (MI.getOpcode() == Hexagon::Y2_dcfetchbo)
+    return HexagonII::DoubleWordAccess;
 
   // Handle vector access sizes.
   const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo();