[PATCH] D120786: [IRSim] Removing length check so first instruction in module is included

[Andrew Litteken via Phabricator via llvm-commits]

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Discussed: https://github.com/llvm/llvm-project/issues/54124

If an instruction is first legal instruction in the module, and is the only legal instruction in its basic block, it will be ignored by the outliner due to a length check inherited from the older version of the outliner that was restricted to outlining within a single basic block.  This removes that check, and updates any tests that broke because of it.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D120786

Files:
  llvm/lib/Analysis/IRSimilarityIdentifier.cpp
  llvm/test/Transforms/IROutliner/outlining-basic-branches.ll
  llvm/test/Transforms/IROutliner/phi-nodes-simple.ll
  llvm/unittests/Analysis/IRSimilarityIdentifierTest.cpp

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