[PATCH] D120648: [RISCV] DAGcombine fold (bswap(srl (bswap c), x)) -> (shl c, x)

Tue Mar 1 02:05:14 PST 2022

Chenbing.Zheng added a comment.

In D120648#3349311 <https://reviews.llvm.org/D120648#3349311>, @craig.topper wrote:

> In D120648#3349296 <https://reviews.llvm.org/D120648#3349296>, @RKSimon wrote:
>
>> TBH, this pattern is probably more likely to occur in general code than anything with a bitreverse
>
> Fair enough, but in that case we need a different set of test cases. All of the examples here could legally be a single brev8(reverse bits within each byte) instruction. The shifts are artifacts of type legalization and shouldn't be there. No amount of DAG combines after type legalization can get to the optimal codegen. The only way to do it is to combine (bitreverse (bswap X)) to brev8 pre-type legalization and then type legalize brev8 with any_extend.

I agree that for these cases in bswap-bitreverse.ll combine (bitreverse (bswap X)) can get more optimizations.  So should we keep this combine？Maybe it can be used elsewhere.

In D120648#3349335 <https://reviews.llvm.org/D120648#3349335>, @spatel wrote:

> We'd probably do better with a smaller match/fold. This is really just recognizing that you can move a logical shift before/after a swap by reversing the direction. We don't get this in IR either if I'm seeing it correctly:
> https://alive2.llvm.org/ce/z/2UmMSu

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120648/new/

https://reviews.llvm.org/D120648