[PATCH] D120702: [RISCV] emit .option directive when generate assembly file

[luxufan via Phabricator via llvm-commits]

StephenFan updated this revision to Diff 412001.
StephenFan added a comment.

add test file


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120702/new/

https://reviews.llvm.org/D120702

Files:
  llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
  llvm/test/CodeGen/RISCV/option-directive.ll


Index: llvm/test/CodeGen/RISCV/option-directive.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/RISCV/option-directive.ll
@@ -0,0 +1,18 @@
+; RUN: llc -mtriple=riscv32 -mattr=-relax %s -o - | FileCheck --check-prefix=RV32-NO-RELAX %s
+; RUN: llc -mtriple=riscv32 -mattr=-c %s -o - | FileCheck --check-prefix=RV32-NO-C-EXTENSION %s
+; RUN: llc -mtriple=riscv32 %s -o - | FileCheck --check-prefix=RV32-NON-POSITION-INDEPENDENT %s
+; RUN: llc -mtriple=riscv64 -mattr=-relax %s -o - | FileCheck --check-prefix=RV64-NO-RELAX %s
+; RUN: llc -mtriple=riscv64 -mattr=-c %s -o - | FileCheck --check-prefix=RV64-NO-C-EXTENSION %s
+; RUN: llc -mtriple=riscv64 %s -o - | FileCheck --check-prefix=RV64-NON-POSITION-INDEPENDENT %s
+
+; RV32-NO-RELAX: .option norelax
+; RV32-NO-C-EXTENSION: .option norvc
+; RV32-NON-POSITION-INDEPENDENT: .option nopic
+; RV64-NO-RELAX: .option norelax
+; RV64-NO-C-EXTENSION: .option norvc
+; RV64-NON-POSITION-INDEPENDENT: .option nopic
+
+define i32 @addi(i32 %a) {
+  %1 = add i32 %a, 1
+  ret i32 %1
+}
Index: llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
+++ llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
@@ -70,6 +70,7 @@
 
 private:
   void emitAttributes();
+  void emitDirectiveOption();
 };
 }
 
@@ -178,8 +179,10 @@
 }
 
 void RISCVAsmPrinter::emitStartOfAsmFile(Module &M) {
-  if (TM.getTargetTriple().isOSBinFormatELF())
-    emitAttributes();
+  if (!TM.getTargetTriple().isOSBinFormatELF())
+    return;
+  emitAttributes();
+  emitDirectiveOption();
 }
 
 void RISCVAsmPrinter::emitEndOfAsmFile(Module &M) {
@@ -196,6 +199,20 @@
   RTS.emitTargetAttributes(*STI);
 }
 
+void RISCVAsmPrinter::emitDirectiveOption() {
+  RISCVTargetStreamer &RTS =
+      static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
+
+  if (!isPositionIndependent())
+    RTS.emitDirectiveOptionNoPIC();
+
+  if (!STI->hasFeature(RISCV::FeatureRelax))
+    RTS.emitDirectiveOptionNoRelax();
+
+  if (!STI->hasFeature(RISCV::FeatureStdExtC))
+    RTS.emitDirectiveOptionNoRVC();
+}
+
 // Force static initialization.
 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVAsmPrinter() {
   RegisterAsmPrinter<RISCVAsmPrinter> X(getTheRISCV32Target());


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