[PATCH] D117654: [RISCV] Support Sinval extension and hypervisor memory management fence instructions
eric tang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Feb 27 22:08:44 PST 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG386c5be92a86: [RISCV] Support Sinval extension and hypervisor memory management fenceā¦ (authored by tangxingxin1008).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D117654/new/
https://reviews.llvm.org/D117654
Files:
llvm/lib/Target/RISCV/RISCVInstrInfo.td
llvm/test/MC/RISCV/priv-invalid.s
llvm/test/MC/RISCV/priv-valid.s
llvm/test/MC/RISCV/rvi-aliases-valid.s
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