[PATCH] D120571: [CGP, AArch64] Replace zexts with shuffle that can be lowered using tbl.

[Florian Hahn via Phabricator via llvm-commits]

fhahn updated this revision to Diff 411604.
fhahn added a comment.

Fixed extraction mask so the extracted elements from the vi16i8 are at the front of each 4 x i8 block, so the vector before bitcasting looks like orig[0], 0, 0, 0, orig[1], 0, 0, 0,....

Modeled in Alive2: https://alive2.llvm.org/ce/z/hnrmsP (although a reduced version)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120571/new/

https://reviews.llvm.org/D120571

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/CodeGenPrepare.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/test/CodeGen/AArch64/vselect-ext.ll
  llvm/test/CodeGen/AArch64/zext-to-tbl.ll
  llvm/test/Transforms/CodeGenPrepare/AArch64/zext-to-shuffle.ll

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