[PATCH] D120202: [AMDGPU] Extend pre-emit peephole to redundantly masked VCC
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 25 07:48:21 PST 2022
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp:149
+ if (A->getOpcode() == And && SReg == CondReg && !ModifiesExec &&
+ TII->isVOPC(*M) && TII->isVALU(*M)) {
+ A->eraseFromParent();
----------------
isVOPC is redundant with isVALU
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D120202/new/
https://reviews.llvm.org/D120202
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