[PATCH] D120538: [AMDGPU] Select no-return atomic ops in BUFInstructions.td

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 25 07:37:25 PST 2022


arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/BUFInstructions.td:1367
 
-multiclass BufferAtomicPatterns<SDPatternOperator name, ValueType vt,
-                                string opcode> {
+multiclass BufferAtomicPat<string OpPrefix, ValueType VT, string Inst> {
+  foreach RtnMode = ["ret", "noret"] in {
----------------
Usually vt is lowercase


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.td:164
 
-class SDBufferAtomic<string opcode> : SDNode <opcode,
-  SDTypeProfile<1, 8,
-       [SDTCisVT<2, v4i32>, // rsrc
-       SDTCisVT<3, i32>,   // vindex(VGPR)
-       SDTCisVT<4, i32>,   // voffset(VGPR)
-       SDTCisVT<5, i32>,   // soffset(SGPR)
-       SDTCisVT<6, i32>,   // offset(imm)
-       SDTCisVT<7, i32>,   // cachepolicy(imm)
-       SDTCisVT<8, i1>]>,  // idxen(imm)
-  [SDNPMemOperand, SDNPHasChain, SDNPMayLoad, SDNPMayStore]
->;
+multiclass SDBufferAtomic<string opcode, bit retNoRet = 1> {
+  def "" : SDNode <opcode,
----------------
I think forcing the SDNode and PatFrags definitions in the same multiclass  is awkward here


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.td:177
+
+  if retNoRet then {
+
----------------
You might as well split this into a separate class at this point


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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120538/new/

https://reviews.llvm.org/D120538



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