[PATCH] D120544: [AMDGPU] Omit unnecessary waitcnt before barriers
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 25 01:33:36 PST 2022
foad added inline comments.
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Comment at: llvm/lib/Target/AMDGPU/GCNSubtarget.h:496
+ /// \returns true if the target supports backing off of s_barrier instructions
+ // when an exception is raised"
+ bool supportsBackOffBarrier() const {
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Stray `"` character
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Comment at: llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp:1139
+ // The subtarget may have an implicit S_WAITCNT 0 before barriers. If it does
+ // not, we need to ensure the subatarget is capable of backing off barrier
+ // instructions in case there are any outstanding memory operations that may
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Typo "subatarget"
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Comment at: llvm/test/CodeGen/AMDGPU/waitcnt-preexisting-vscnt.mir:38
; GFX10: GLOBAL_STORE_DWORD $vgpr0_vgpr1, $vgpr2, 0, 0, implicit $exec
- ; GFX10: S_WAITCNT_VSCNT undef $sgpr_null, 0
+ ; GFX10: S_WAITCNT_VSCNT undef $sgpr_null, 1
; GFX10: S_BARRIER
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Isn't this "waitcnt 1" redundant, since we have just done a "waitcnt 0" and then issued one store? Or am I completely misunderstanding?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D120544/new/
https://reviews.llvm.org/D120544
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