[PATCH] D120440: [SVE] Refactor complex immediate pattern used by CPY/DUP.

[Paul Walker via Phabricator via llvm-commits]

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SelectSVE8BitLslImm didn't account for constant values that have a
larger bit width than the result vector's element type.  This only
seems to affect a single corner case when lowering fixed length
vectors but the code itself is also not consistent with how other
related complex patterns are implemented so I've taken the
opportunity to refactor the code.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D120440

Files:
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/sve-fixed-length-float-compares.ll

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