[PATCH] D119475: [AMDGPU] Add scheduler pass to rematerialize trivial defs

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp:775
+  // First check if we have enough trivially rematerializable instructions
+  int BestRegDiff = VGPRUsage - RematerializableInsts.size();
+  BestRegDiff = std::max(BestRegDiff, 0);
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vpykhtin wrote:
> 1. BestRegDiff is a misleading name, this is actually the number of VGPRs would left after sinking in the best case.
> 2. This implies that RematerializableInsts.size() is the number of 32bit VGPRs freed after sinking? I'm not sure if there are any 64bit rematerializable instructions, but what if they're eventually added?
> 
Actually an example of such instruction is V_CVT_F64_I32.


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  https://reviews.llvm.org/D119475/new/

https://reviews.llvm.org/D119475