[PATCH] D120400: [MIRParser] Diagnose too large align values in MachineMemOperands

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/merge-global-load-store.mir:413
     %0:vreg_64_align2 = IMPLICIT_DEF
-    %1:vgpr_32 = GLOBAL_LOAD_DWORD %0, 4, 0, implicit $exec :: (load (s32) from `i32 addrspace(1)* undef` + 4, align 8, addrspace 1)
+    %1:vgpr_32 = GLOBAL_LOAD_DWORD %0, 4, 0, implicit $exec :: (load (s32) from `i32 addrspace(1)* undef` + 4, basealign 8, addrspace 1)
     %2:vgpr_32 = GLOBAL_LOAD_DWORD %0, 0, 0, implicit $exec :: (load (s32) from `float addrspace(1)* undef`, align 4, addrspace 1)
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rampitec wrote:
> Well, this is unlikely to happen in real life, but this was exactly my point writing this torture test: basealign is 4, and we have managed to know it is misaligned by 8, so ptr +4 has exactly align 8.
> 
> I believe MIR parser is correct, it just does what is written.
> it just does what is written

No, it takes the "align" value as written and uses it to set the basealign field instead.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120400/new/

https://reviews.llvm.org/D120400