[PATCH] D120400: [MIRParser] Diagnose too large align values in MachineMemOperands

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 23 03:46:10 PST 2022


foad created this revision.
foad added reviewers: t.p.northover, rampitec, arsenm, atanasyan, nemanjai.
Herald added subscribers: kerbowa, jrtc27, hiraditya, jvesely, sdardis, qcolombet.
foad requested review of this revision.
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When parsing MachineMemOperands, MIRParser treated the "align" keyword
the same as "basealign". Really "basealign" should specify the
alignment of the MachinePointerInfo base value, and "align" should
specify the alignment of that base value plus the offset.

This worked OK when the specified alignment was no larger than the
alignment of the offset, but in cases like this it just caused
confusion:

  STW killed %18, 4, %stack.1.ap2.i.i :: (store (s32) into %stack.1.ap2.i.i + 4, align 8)

MIRPrinter would never have printed this, with an offset of 4 but an
align of 8, so it must have been written by hand. MIRParser would
interpret "align 8" as "basealign 8", but I think it is better to give
an error and force the user to write "basealign 8" if that is what they
really meant.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D120400

Files:
  llvm/lib/CodeGen/MIRParser/MILexer.cpp
  llvm/lib/CodeGen/MIRParser/MIParser.cpp
  llvm/test/CodeGen/AMDGPU/merge-global-load-store.mir
  llvm/test/CodeGen/Mips/msa/emergency-spill.mir
  llvm/test/CodeGen/PowerPC/stack-coloring-vararg.mir
  llvm/test/DebugInfo/AArch64/asan-stack-vars.mir

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