[llvm] 606320e - [VE][NFC] Move functions to VVP module
Simon Moll via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 23 01:46:04 PST 2022
Author: Simon Moll
Date: 2022-02-23T10:44:56+01:00
New Revision: 606320ed30fd8a8fc01afb71a7e107cd7f1f90da
URL: https://github.com/llvm/llvm-project/commit/606320ed30fd8a8fc01afb71a7e107cd7f1f90da
DIFF: https://github.com/llvm/llvm-project/commit/606320ed30fd8a8fc01afb71a7e107cd7f1f90da.diff
LOG: [VE][NFC] Move functions to VVP module
Separate vector isel functions to the module they belong to. Keep scalar
stuff and calls into vector isel in the VEISelLowering.
Added:
Modified:
llvm/lib/Target/VE/VEISelLowering.cpp
llvm/lib/Target/VE/VVPISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/VE/VEISelLowering.cpp b/llvm/lib/Target/VE/VEISelLowering.cpp
index 0e3f2eb522829..1f75dcc6324ce 100644
--- a/llvm/lib/Target/VE/VEISelLowering.cpp
+++ b/llvm/lib/Target/VE/VEISelLowering.cpp
@@ -2707,78 +2707,6 @@ bool VETargetLowering::hasAndNot(SDValue Y) const {
return true;
}
-SDValue VETargetLowering::splitMaskArithmetic(SDValue Op,
- SelectionDAG &DAG) const {
- VECustomDAG CDAG(DAG, Op);
- SDValue AVL =
- CDAG.getConstant(Op.getValueType().getVectorNumElements(), MVT::i32);
- SDValue A = Op->getOperand(0);
- SDValue B = Op->getOperand(1);
- SDValue LoA = CDAG.getUnpack(MVT::v256i1, A, PackElem::Lo, AVL);
- SDValue HiA = CDAG.getUnpack(MVT::v256i1, A, PackElem::Hi, AVL);
- SDValue LoB = CDAG.getUnpack(MVT::v256i1, B, PackElem::Lo, AVL);
- SDValue HiB = CDAG.getUnpack(MVT::v256i1, B, PackElem::Hi, AVL);
- unsigned Opc = Op.getOpcode();
- auto LoRes = CDAG.getNode(Opc, MVT::v256i1, {LoA, LoB});
- auto HiRes = CDAG.getNode(Opc, MVT::v256i1, {HiA, HiB});
- return CDAG.getPack(MVT::v512i1, LoRes, HiRes, AVL);
-}
-
-SDValue VETargetLowering::lowerToVVP(SDValue Op, SelectionDAG &DAG) const {
- // Can we represent this as a VVP node.
- const unsigned Opcode = Op->getOpcode();
- auto VVPOpcodeOpt = getVVPOpcode(Opcode);
- if (!VVPOpcodeOpt.hasValue())
- return SDValue();
- unsigned VVPOpcode = VVPOpcodeOpt.getValue();
- const bool FromVP = ISD::isVPOpcode(Opcode);
-
- // The representative and legalized vector type of this operation.
- VECustomDAG CDAG(DAG, Op);
- EVT OpVecVT = Op.getValueType();
- EVT LegalVecVT = getTypeToTransformTo(*DAG.getContext(), OpVecVT);
- auto Packing = getTypePacking(LegalVecVT.getSimpleVT());
-
- SDValue AVL;
- SDValue Mask;
-
- if (FromVP) {
- // All upstream VP SDNodes always have a mask and avl.
- auto MaskIdx = ISD::getVPMaskIdx(Opcode);
- auto AVLIdx = ISD::getVPExplicitVectorLengthIdx(Opcode);
- if (MaskIdx)
- Mask = Op->getOperand(*MaskIdx);
- if (AVLIdx)
- AVL = Op->getOperand(*AVLIdx);
-
- }
-
- // Materialize default mask and avl.
- if (!AVL)
- AVL = CDAG.getConstant(OpVecVT.getVectorNumElements(), MVT::i32);
- if (!Mask)
- Mask = CDAG.getConstantMask(Packing, true);
-
- if (isVVPBinaryOp(VVPOpcode)) {
- assert(LegalVecVT.isSimple());
- return CDAG.getNode(VVPOpcode, LegalVecVT,
- {Op->getOperand(0), Op->getOperand(1), Mask, AVL});
- }
- if (VVPOpcode == VEISD::VVP_SELECT) {
- auto Mask = Op->getOperand(0);
- auto OnTrue = Op->getOperand(1);
- auto OnFalse = Op->getOperand(2);
- return CDAG.getNode(VVPOpcode, LegalVecVT, {OnTrue, OnFalse, Mask, AVL});
- }
- if (VVPOpcode == VEISD::VVP_SETCC) {
- auto LHS = Op->getOperand(0);
- auto RHS = Op->getOperand(1);
- auto Pred = Op->getOperand(2);
- return CDAG.getNode(VVPOpcode, LegalVecVT, {LHS, RHS, Pred, Mask, AVL});
- }
- llvm_unreachable("lowerToVVP called for unexpected SDNode.");
-}
-
SDValue VETargetLowering::lowerEXTRACT_VECTOR_ELT(SDValue Op,
SelectionDAG &DAG) const {
assert(Op.getOpcode() == ISD::EXTRACT_VECTOR_ELT && "Unknown opcode!");
diff --git a/llvm/lib/Target/VE/VVPISelLowering.cpp b/llvm/lib/Target/VE/VVPISelLowering.cpp
index 54fdd9f3ac543..e3fba730e5ad4 100644
--- a/llvm/lib/Target/VE/VVPISelLowering.cpp
+++ b/llvm/lib/Target/VE/VVPISelLowering.cpp
@@ -18,6 +18,77 @@ using namespace llvm;
#define DEBUG_TYPE "ve-lower"
+SDValue VETargetLowering::splitMaskArithmetic(SDValue Op,
+ SelectionDAG &DAG) const {
+ VECustomDAG CDAG(DAG, Op);
+ SDValue AVL =
+ CDAG.getConstant(Op.getValueType().getVectorNumElements(), MVT::i32);
+ SDValue A = Op->getOperand(0);
+ SDValue B = Op->getOperand(1);
+ SDValue LoA = CDAG.getUnpack(MVT::v256i1, A, PackElem::Lo, AVL);
+ SDValue HiA = CDAG.getUnpack(MVT::v256i1, A, PackElem::Hi, AVL);
+ SDValue LoB = CDAG.getUnpack(MVT::v256i1, B, PackElem::Lo, AVL);
+ SDValue HiB = CDAG.getUnpack(MVT::v256i1, B, PackElem::Hi, AVL);
+ unsigned Opc = Op.getOpcode();
+ auto LoRes = CDAG.getNode(Opc, MVT::v256i1, {LoA, LoB});
+ auto HiRes = CDAG.getNode(Opc, MVT::v256i1, {HiA, HiB});
+ return CDAG.getPack(MVT::v512i1, LoRes, HiRes, AVL);
+}
+
+SDValue VETargetLowering::lowerToVVP(SDValue Op, SelectionDAG &DAG) const {
+ // Can we represent this as a VVP node.
+ const unsigned Opcode = Op->getOpcode();
+ auto VVPOpcodeOpt = getVVPOpcode(Opcode);
+ if (!VVPOpcodeOpt.hasValue())
+ return SDValue();
+ unsigned VVPOpcode = VVPOpcodeOpt.getValue();
+ const bool FromVP = ISD::isVPOpcode(Opcode);
+
+ // The representative and legalized vector type of this operation.
+ VECustomDAG CDAG(DAG, Op);
+ EVT OpVecVT = Op.getValueType();
+ EVT LegalVecVT = getTypeToTransformTo(*DAG.getContext(), OpVecVT);
+ auto Packing = getTypePacking(LegalVecVT.getSimpleVT());
+
+ SDValue AVL;
+ SDValue Mask;
+
+ if (FromVP) {
+ // All upstream VP SDNodes always have a mask and avl.
+ auto MaskIdx = ISD::getVPMaskIdx(Opcode);
+ auto AVLIdx = ISD::getVPExplicitVectorLengthIdx(Opcode);
+ if (MaskIdx)
+ Mask = Op->getOperand(*MaskIdx);
+ if (AVLIdx)
+ AVL = Op->getOperand(*AVLIdx);
+ }
+
+ // Materialize default mask and avl.
+ if (!AVL)
+ AVL = CDAG.getConstant(OpVecVT.getVectorNumElements(), MVT::i32);
+ if (!Mask)
+ Mask = CDAG.getConstantMask(Packing, true);
+
+ if (isVVPBinaryOp(VVPOpcode)) {
+ assert(LegalVecVT.isSimple());
+ return CDAG.getNode(VVPOpcode, LegalVecVT,
+ {Op->getOperand(0), Op->getOperand(1), Mask, AVL});
+ }
+ if (VVPOpcode == VEISD::VVP_SELECT) {
+ auto Mask = Op->getOperand(0);
+ auto OnTrue = Op->getOperand(1);
+ auto OnFalse = Op->getOperand(2);
+ return CDAG.getNode(VVPOpcode, LegalVecVT, {OnTrue, OnFalse, Mask, AVL});
+ }
+ if (VVPOpcode == VEISD::VVP_SETCC) {
+ auto LHS = Op->getOperand(0);
+ auto RHS = Op->getOperand(1);
+ auto Pred = Op->getOperand(2);
+ return CDAG.getNode(VVPOpcode, LegalVecVT, {LHS, RHS, Pred, Mask, AVL});
+ }
+ llvm_unreachable("lowerToVVP called for unexpected SDNode.");
+}
+
SDValue VETargetLowering::legalizeInternalVectorOp(SDValue Op,
SelectionDAG &DAG) const {
VECustomDAG CDAG(DAG, Op);
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