[PATCH] D120332: [RISCV] Avoid infinite loop between DAGCombiner::visitMUL and RISCVISelLowering::transformAddImmMulImm

Ben Shi via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 22 18:50:21 PST 2022

Previous message: [PATCH] D120332: [RISCV] Avoid infinite loop between DAGCombiner::visitMUL and RISCVISelLowering::transformAddImmMulImm
Next message: [PATCH] D120332: [RISCV] Avoid infinite loop between DAGCombiner::visitMUL and RISCVISelLowering::transformAddImmMulImm
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

benshi001 accepted this revision.
benshi001 added a comment.

Thanks for fixing the issue introduced by me.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120332/new/

https://reviews.llvm.org/D120332

Previous message: [PATCH] D120332: [RISCV] Avoid infinite loop between DAGCombiner::visitMUL and RISCVISelLowering::transformAddImmMulImm
Next message: [PATCH] D120332: [RISCV] Avoid infinite loop between DAGCombiner::visitMUL and RISCVISelLowering::transformAddImmMulImm
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list