[PATCH] D120018: [AArch64] Alter mull shuffle(ext(..)) combine to work on buildvectors

[Benjamin Kramer via Phabricator via llvm-commits]

bkramer added a comment.

Reduced test case:

  target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
  target triple = "aarch64--linux-eabi"
  
  define void @foo() local_unnamed_addr {
    %tmp = xor <16 x i1> zeroinitializer, <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>
    %tmp6 = load <8 x i16>, <8 x i16>* null, align 2
    %tmp7 = sub <8 x i16> zeroinitializer, %tmp6
    %tmp8 = shufflevector <8 x i16> %tmp7, <8 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
    %tmp9 = icmp slt i64 0, undef
    %tmp10 = zext i1 %tmp9 to i16
    %tmp11 = insertelement <16 x i16> undef, i16 %tmp10, i64 0
    %tmp12 = shufflevector <16 x i16> %tmp11, <16 x i16> undef, <16 x i32> zeroinitializer
    %tmp13 = mul nuw <16 x i16> %tmp8, %tmp12
    %tmp14 = icmp ne <16 x i16> %tmp13, zeroinitializer
    %tmp15 = and <16 x i1> %tmp14, %tmp
    %tmp16 = sext <16 x i1> %tmp15 to <16 x i8>
    %tmp17 = bitcast i8* undef to <16 x i8>*
    store <16 x i8> %tmp16, <16 x i8>* %tmp17, align 1
    ret void
  }



  $ llc t.ll
  Value type is non-standard value, Other.
  UNREACHABLE executed at llvm-project/llvm/include/llvm/Support/MachineValueType.h:869!


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  https://reviews.llvm.org/D120018/new/

https://reviews.llvm.org/D120018