[llvm] 0b90007 - [GISel] Silence 'sideeffect in assertion' coverity warnings. NFCI.

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-02-22T12:09:07Z
New Revision: 0b900073457497e19d4c55541dc557520c07b9ad

URL: https://github.com/llvm/llvm-project/commit/0b900073457497e19d4c55541dc557520c07b9ad
DIFF: https://github.com/llvm/llvm-project/commit/0b900073457497e19d4c55541dc557520c07b9ad.diff

LOG: [GISel] Silence 'sideeffect in assertion' coverity warnings. NFCI.

Use llvm::enumerate to keep track of index.

Added: 
    

Modified: 
    llvm/utils/TableGen/RegisterBankEmitter.cpp

Removed: 
    


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diff  --git a/llvm/utils/TableGen/RegisterBankEmitter.cpp b/llvm/utils/TableGen/RegisterBankEmitter.cpp
index d97d7acb87a79..2cc8c0f548b2d 100644
--- a/llvm/utils/TableGen/RegisterBankEmitter.cpp
+++ b/llvm/utils/TableGen/RegisterBankEmitter.cpp
@@ -266,9 +266,8 @@ void RegisterBankEmitter::emitBaseClassImplementation(
      << "::NumRegisterBanks) {\n"
      << "  // Assert that RegBank indices match their ID's\n"
      << "#ifndef NDEBUG\n"
-     << "  unsigned Index = 0;\n"
-     << "  for (const auto &RB : RegBanks)\n"
-     << "    assert(Index++ == RB->getID() && \"Index != ID\");\n"
+     << "  for (auto RB : enumerate(RegBanks))\n"
+     << "    assert(RB.index() == RB.value()->getID() && \"Index != ID\");\n"
      << "#endif // NDEBUG\n"
      << "}\n"
      << "} // end namespace llvm\n";