[PATCH] D120235: [RISCV] Fold store of vmv.f.s to a vse with VL=1.

[Jianjian Guan via Phabricator via llvm-commits]

jacquesguan added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td:960
+  defvar store_instr = !cast<Instruction>("PseudoVSE"#vti.SEW#"_V_"#vti.LMul.MX);
+  def : Pat<(store (vti.Scalar (int_riscv_vfmv_f_s (vti.Vector vti.RegClass:$rs2))), BaseAddr:$rs1),
+            (store_instr vti.RegClass:$rs2, BaseAddr:$rs1, 1, vti.Log2SEW)>;
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craig.topper wrote:
> Is the intrinsic pattern tested?
Done


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120235/new/

https://reviews.llvm.org/D120235