[PATCH] D95588: [RISCV] Implement the MC layer support of P extension

[Jim Lin via Phabricator via llvm-commits]

Jim marked an inline comment as done.
Jim added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll:4360
 ; LMULMAX1-RV64-NEXT:    vid.v v10
+; LMULMAX1-RV64-NEXT:    vadd.vi v11, v10, 2
+; LMULMAX1-RV64-NEXT:    lui a2, %hi(.LCPI132_2)
----------------
The change for this testcase is that GPRJALR regclass is subsumed by GPR32Pair_with_gpr32_pair_lo_in_GPRNoX0X2 regclass.
And register pressure calculation is different.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95588/new/

https://reviews.llvm.org/D95588