[PATCH] D120104: [AArch64] Enable fuse-literals feature by default

Mon Feb 21 01:01:11 PST 2022

dmgreen added a comment.

> This diff enables fuse-literals feature by default,
> in particular, it adjusts instruction scheduling to place ADRP+ADD pairs together and match GCC's behavior

>From what I can tell from context (D117614 <https://reviews.llvm.org/D117614>), this is only really aiming to fuse adrp+add? Does it need to fuse all the MOVW/MOVK then? (And alter the limits for MOK generation, I'm not sure if that is beneficial or not on all cores, but it seems to at least be unrelated). The MOVW/MOVK seems to be where most of the test differences are coming from.

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Comment at: llvm/test/CodeGen/AArch64/arm64_32.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --force-update
 ; RUN: llc -mtriple=arm64_32-apple-ios7.0 %s -filetype=obj -o - -disable-post-ra -frame-pointer=non-leaf | \
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This is making a lot of unrelated test changes in this and other files. It's best not to do that in a single review, but it looks like in this case the check lines have been carefully constructed, with comments, and a lot of that has been lost by just running the update scripts. It doesn't look like much should change in the file.

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Comment at: llvm/test/CodeGen/AArch64/large-consts.ll:8
 define double @foo() {
-
-; CHECK: movz [[CPADDR:x[0-9]+]], #:abs_g0_nc:.LCPI0_0   // encoding: [0bAAA01000,A,0b100AAAAA,0xd2]
-; CHECK: movk [[CPADDR]], #:abs_g1_nc:.LCPI0_0 // encoding: [0bAAA01000,A,0b101AAAAA,0xf2]
-; CHECK: movk [[CPADDR]], #:abs_g2_nc:.LCPI0_0 // encoding: [0bAAA01000,A,0b110AAAAA,0xf2]
-; CHECK: movk [[CPADDR]], #:abs_g3:.LCPI0_0 // encoding: [0bAAA01000,A,0b111AAAAA,0xf2]
+; CHECK-LABEL: foo:
+; CHECK:       // %bb.0:
----------------
This seems to be testing something else now.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120104/new/

https://reviews.llvm.org/D120104