[PATCH] D120152: [AArch64][SVE] Match VLS all-1's masks to PTRUE
Cameron McInally via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 18 13:28:04 PST 2022
cameron.mcinally added a comment.
In D120152#3332664 <https://reviews.llvm.org/D120152#3332664>, @tschuett wrote:
> Why didn't or cannot InstCombine catch this?
I may be misunderstanding, but this pattern is just a legalized truncate, e.g. `({1,1,1,1} & splat(1)) != splat(0)`. The VLS->VLA transition is creating a bunch of extra nodes that need to be matched.
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https://reviews.llvm.org/D120152/new/
https://reviews.llvm.org/D120152
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