[PATCH] D120130: [RISCV] Fix zfinx test error in rust

[Shao-Ce SUN via Phabricator via llvm-commits]

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In D93298 <https://reviews.llvm.org/D93298>: It appears that this is causing an assertion segfault in a rustc test over at our experimental rust + llvm at head bot:
https://buildkite.com/llvm-project/rust-llvm-integrate-prototype/builds/8430#167e6de5-2dd5-41c3-87d7-b6e3f3908371/262-706
The test is https://github.com/rust-lang/rust/blob/master/src/test/assembly/asm/riscv-types.rs


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D120130

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp


Index: llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -270,13 +270,17 @@
   unsigned NF = 1;
   RISCVII::VLMUL LMul = RISCVII::LMUL_1;
   unsigned SubRegIdx = RISCV::sub_vrm1_0;
-  if (RISCV::FPR16RegClass.contains(DstReg, SrcReg)) {
+  if (RISCV::FPR16RegClass.contains(DstReg, SrcReg) ||
+      RISCV::GPRF16RegClass.contains(DstReg, SrcReg)) {
     Opc = RISCV::FSGNJ_H;
     IsScalableVector = false;
-  } else if (RISCV::FPR32RegClass.contains(DstReg, SrcReg)) {
+  } else if (RISCV::FPR32RegClass.contains(DstReg, SrcReg) ||
+             RISCV::GPRF32RegClass.contains(DstReg, SrcReg)) {
     Opc = RISCV::FSGNJ_S;
     IsScalableVector = false;
-  } else if (RISCV::FPR64RegClass.contains(DstReg, SrcReg)) {
+  } else if (RISCV::FPR64RegClass.contains(DstReg, SrcReg) ||
+             RISCV::GPRF64RegClass.contains(DstReg, SrcReg) ||
+             RISCV::GPRPF64RegClass.contains(DstReg, SrcReg)) {
     Opc = RISCV::FSGNJ_D;
     IsScalableVector = false;
   } else if (RISCV::VRRegClass.contains(DstReg, SrcReg)) {


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