[llvm] 77cf18f - [MachineOutliner] Add testcase for instruction mapping stats

[Jessica Paquette via llvm-commits]

Author: Jessica Paquette
Date: 2022-02-17T18:26:59-08:00
New Revision: 77cf18fa1899869e05bee6a13f23881b3e8bf042

URL: https://github.com/llvm/llvm-project/commit/77cf18fa1899869e05bee6a13f23881b3e8bf042
DIFF: https://github.com/llvm/llvm-project/commit/77cf18fa1899869e05bee6a13f23881b3e8bf042.diff

LOG: [MachineOutliner] Add testcase for instruction mapping stats

I forgot to attach the testcase for 12389e375811d46ce41d949857f8b469d6563114!

Added: 
    llvm/test/CodeGen/AArch64/machine-outliner-mapping-stats.mir

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AArch64/machine-outliner-mapping-stats.mir b/llvm/test/CodeGen/AArch64/machine-outliner-mapping-stats.mir
new file mode 100644
index 0000000000000..7b6ffbe97cd0f
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-mapping-stats.mir
@@ -0,0 +1,29 @@
+# RUN: llc -mtriple=aarch64 -run-pass=machine-outliner -verify-machineinstrs -stats %s -o - 2>&1 | FileCheck %s
+# REQUIRES: asserts
+
+# Check that instruction mapping stats work.
+
+# We ought to map all of the instructions (5 of them) as legal, and then
+# terminate the string with a single illegal character. Debug instructions are
+# always invisible, and don't contribute to the length of the string.
+
+# CHECK: 1 machine-outliner - Number of illegal instrs in unsigned vector
+# CHECK: 1 machine-outliner - Number of invisible instrs in unsigned vector
+# CHECK: 5 machine-outliner - Number of legal instrs in unsigned vector
+# CHECK: 6 machine-outliner - Size of unsigned vector
+
+...
+---
+name:            test
+tracksRegLiveness: true
+machineFunctionInfo:
+  hasRedZone:      false
+body:             |
+  bb.0:
+  liveins: $lr
+    $x0 = ORRXri $xzr, 1
+    $x1 = ORRXri $xzr, 1
+    $x2 = ORRXri $xzr, 1
+    DBG_VALUE $x3, $noreg
+    $x3 = ORRXri $xzr, 1
+    RET undef $lr