[PATCH] D120094: [CallingConv] Generate isArgumentRegister() predicate via tablegen

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added a comment.

Revision summary seems to be totally lacking any explanation of what this actually is for. Also how is this meant to interact with architectures like MIPS where return value registers aren't argument registers (v0 and v1); is it meant to include those or not? The name suggests it does, but the old function name suggested it didn't (and was just a stub outside of X86?).



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Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.h:73
+  bool isCallingConvReg(MachineFunction &, MCRegister) const override {
+    llvm_unreachable("isCallingConvReg not implmented for RISCV");
+    return false;
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  https://reviews.llvm.org/D120094/new/

https://reviews.llvm.org/D120094