[PATCH] D120072: [PowerPC] Disable perfect shuffle by default

[Qiu Chaofan via Phabricator via llvm-commits]

qiucf created this revision.
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Perfect shuffle was introduced into PowerPC backend years ago, and only available in big-endian subtargets.

This optimization has good effects in simple cases, but brings serious negative impact in large programs with many shuffle instructions sharing the same mask. D116801 <https://reviews.llvm.org/D116801> fixes the issue in those programs, but still causes performance degradation similar to disabling perfect shuffle.

So I propose introducing a temporary backend hidden option to control it (disabled by default) until we implemented better way to fix the gap in vectorshuffle decomposition.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D120072

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/2006-08-11-RetVector.ll
  llvm/test/CodeGen/PowerPC/aix-p9-xxinsertw-xxextractuw.ll
  llvm/test/CodeGen/PowerPC/aix-vsx-splatimm.ll
  llvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll
  llvm/test/CodeGen/PowerPC/extract-and-store.ll
  llvm/test/CodeGen/PowerPC/load-and-splat.ll
  llvm/test/CodeGen/PowerPC/p8altivec-shuffles-pred.ll
  llvm/test/CodeGen/PowerPC/perfect-shuffle.ll
  llvm/test/CodeGen/PowerPC/pgo-ref-directive.ll
  llvm/test/CodeGen/PowerPC/ppc-32bit-build-vector.ll
  llvm/test/CodeGen/PowerPC/pr27078.ll
  llvm/test/CodeGen/PowerPC/scalar_vector_test_4.ll
  llvm/test/CodeGen/PowerPC/test-vector-insert.ll
  llvm/test/CodeGen/PowerPC/vec_extract_p9.ll
  llvm/test/CodeGen/PowerPC/vec_perf_shuffle.ll
  llvm/test/CodeGen/PowerPC/vec_shuffle_p8vector.ll

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