[PATCH] D114642: [AArch64][SchedModels] Handle virtual registers in FP/NEON predicates

Pavel Kosov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 17 02:43:37 PST 2022


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGf3809b20f2d9: [AArch64][SchedModels] Handle virtual registers in FP/NEON predicates (authored by kpdev42).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114642/new/

https://reviews.llvm.org/D114642

Files:
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.h
  llvm/lib/Target/AArch64/AArch64SchedPredExynos.td
  llvm/lib/Target/AArch64/AArch64SchedPredicates.td
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
  llvm/test/CodeGen/AArch64/misched-predicate-virtreg.mir

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