[PATCH] D120008: [RISCV][NFC] Add some tail agnostic tests for nomask operations.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/unmasked-ta.ll:1124
+; RV32-NEXT:    sw a0, 8(sp)
+; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, mu
+; RV32-NEXT:    addi a0, sp, 8
----------------
rogfer01 wrote:
> For those who care about RV32V I wonder if `vslidedown.vi ..., 2` followed by two `vslide1up.vx` could be used here so we avoid the load and the merge (maybe it is not faster after all).
> 
> No need to fix it in this change, of course.
Do you need a slidedown? Couldn't you do two SEW=32 vslide1ups with a vl of 2?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120008/new/

https://reviews.llvm.org/D120008