[PATCH] D120009: [RISCV][NFC] Add sched and adjust predicates for some instructions in Zb extension

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZb.td:860
 
+let Predicates = [HasStdExtZbpOrZbkb, IsRV32] in {
 // We treat zip and unzip as separate instructions, so match it directly.
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Is this not a functional change for RV64 because ZIP_RV32 will put 0b01111 in bits 24:20 which matches the 15 that was requested in the pattern?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120009/new/

https://reviews.llvm.org/D120009