[llvm] 67ab4c0 - [MachineOutliner] NFC: Update LRU stuff for RISCV

Jessica Paquette via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 16 12:02:09 PST 2022


Author: Jessica Paquette
Date: 2022-02-16T12:01:59-08:00
New Revision: 67ab4c010b40e0f92656d652448ede13432c894a

URL: https://github.com/llvm/llvm-project/commit/67ab4c010b40e0f92656d652448ede13432c894a
DIFF: https://github.com/llvm/llvm-project/commit/67ab4c010b40e0f92656d652448ede13432c894a.diff

LOG: [MachineOutliner] NFC: Update LRU stuff for RISCV

I missed it in my grep. Fixes broken buildbot.`

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index eb7825819e69..a5f072c7c260 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -1205,10 +1205,7 @@ outliner::OutlinedFunction RISCVInstrInfo::getOutliningCandidateInfo(
   // be used to setup the function call.
   auto CannotInsertCall = [](outliner::Candidate &C) {
     const TargetRegisterInfo *TRI = C.getMF()->getSubtarget().getRegisterInfo();
-
-    C.initLRU(*TRI);
-    LiveRegUnits LRU = C.LRU;
-    return !LRU.available(RISCV::X5);
+    return !C.isAvailableAcrossAndOutOfSeq(RISCV::X5, *TRI);
   };
 
   llvm::erase_if(RepeatedSequenceLocs, CannotInsertCall);


        


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