[PATCH] D119424: [AArch64][SVE] Invert VSelect operand order and condition for predicated arithmetic operations

Peter Waller via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 16 03:02:41 PST 2022


peterwaller-arm accepted this revision.
peterwaller-arm added inline comments.
This revision is now accepted and ready to land.


================
Comment at: llvm/test/CodeGen/AArch64/sve-select.ll:546
+
+define <vscale x 4 x float> @select_f32_invert_fmul(<vscale x 4 x float> %a, <vscale x 4 x float> %b) #0 {
+; CHECK-LABEL: select_f32_invert_fmul:
----------------
Nit. This refers to attribute group #0 which is undefined.


================
Comment at: llvm/test/CodeGen/AArch64/sve-select.ll:640-641
+}
+
+define <4 x float> @select_f32_no_invert_not_scalable(<4 x float> %a, <4 x float> %b) #0 {
+; CHECK-LABEL: select_f32_no_invert_not_scalable:
----------------
Nit. Same again: This refers to attribute group #0 which is undefined.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D119424/new/

https://reviews.llvm.org/D119424



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