[PATCH] D119916: Add a machine function pass to convert binop(phi(constants), v) to phi(binop)

Guozhi Wei via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 15 22:55:24 PST 2022


Carrot created this revision.
Carrot added reviewers: lebedev.ri, spatel, nikic, craig.topper.
Herald added subscribers: kerbowa, pengfei, hiraditya, mgorny, jvesely, nemanjai, qcolombet.
Carrot requested review of this revision.
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This is a Machine Function version of D116058 <https://reviews.llvm.org/D116058>, also a conservative version of D37467 <https://reviews.llvm.org/D37467> without critical edge splitting.

This pass does the transformation

    bb.0:
      ...
      %3:gr32 = MOV32ri 7
      JCC_1 %bb.2, 5, implicit $eflags
  
    bb.1:
      %5:gr32 = MOV32ri 11
  
    bb.2:
      %0:gr32 = PHI %3:gr32, %bb.0, %5:gr32, %bb.1                         // At most one non-const operand
      %6:gr32 = ADD32rr %2:gr32(tied-def 0), %0:gr32, implicit-def dead $eflags
      ...
  
  =>
  
    bb.0:
      ...
      %7:gr32 = ADD32ri8 %2:gr32(tied-def 0), 7, implicit-def dead $eflags
      JCC_1 %bb.2, 5, implicit $eflags
  
    bb.1:
      %8:gr32 = ADD32ri8 %2:gr32(tied-def 0), 11, implicit-def dead $eflags
  
    bb.2:
      %6:gr32 = PHI %7:gr32, %bb.0, %8:gr32, %bb.1
      ...

So we can reduce both static and dynamic instructions. If there is one non-const operand, we can still do the transformation without code size improvement, but still have performance improvement.

Test case dup-phi-users1.ll is from D116058 <https://reviews.llvm.org/D116058> and dup-phi-users2.ll is from D37467 <https://reviews.llvm.org/D37467>.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D119916

Files:
  llvm/include/llvm/CodeGen/MachinePassRegistry.def
  llvm/include/llvm/CodeGen/Passes.h
  llvm/include/llvm/CodeGen/TargetInstrInfo.h
  llvm/include/llvm/InitializePasses.h
  llvm/lib/CodeGen/CMakeLists.txt
  llvm/lib/CodeGen/CodeGen.cpp
  llvm/lib/CodeGen/DupConstPhiUsers.cpp
  llvm/lib/CodeGen/PeepholeOptimizer.cpp
  llvm/lib/CodeGen/TargetPassConfig.cpp
  llvm/lib/Target/X86/X86InstrInfo.cpp
  llvm/lib/Target/X86/X86InstrInfo.h
  llvm/test/CodeGen/AArch64/O3-pipeline.ll
  llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
  llvm/test/CodeGen/ARM/O3-pipeline.ll
  llvm/test/CodeGen/PowerPC/O3-pipeline.ll
  llvm/test/CodeGen/X86/dup-phi-users1.ll
  llvm/test/CodeGen/X86/dup-phi-users2.ll
  llvm/test/CodeGen/X86/fast-isel-freeze.ll
  llvm/test/CodeGen/X86/lrshrink.ll
  llvm/test/CodeGen/X86/opt-pipeline.ll
  llvm/test/CodeGen/X86/physreg-pairs.ll
  llvm/test/CodeGen/X86/popcnt.ll
  llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll
  llvm/test/CodeGen/X86/remat-phys-dead.ll
  llvm/test/CodeGen/X86/speculative-load-hardening-call-and-ret.ll

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