[llvm] 1a5b881 - Revert [SystemZ][z/OS] Fix f32 variadic argument assertion

[Neumann Hon via llvm-commits]

Author: Mubariz Afzal
Date: 2022-02-15T23:28:40-05:00
New Revision: 1a5b881d4cf0fafe78258825f6442277e1636ecb

URL: https://github.com/llvm/llvm-project/commit/1a5b881d4cf0fafe78258825f6442277e1636ecb
DIFF: https://github.com/llvm/llvm-project/commit/1a5b881d4cf0fafe78258825f6442277e1636ecb.diff

LOG: Revert [SystemZ][z/OS] Fix f32 variadic argument assertion

This reverts ea0676f97d734196b15da7553cd407e6a36cef2d

Added: 
    

Modified: 
    llvm/lib/Target/SystemZ/SystemZCallingConv.td
    llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
    llvm/test/CodeGen/SystemZ/call-zos-vararg.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/SystemZ/SystemZCallingConv.td b/llvm/lib/Target/SystemZ/SystemZCallingConv.td
index bc5f6a15d493c..a7ea5e1e4bf80 100644
--- a/llvm/lib/Target/SystemZ/SystemZCallingConv.td
+++ b/llvm/lib/Target/SystemZ/SystemZCallingConv.td
@@ -225,10 +225,9 @@ def CC_SystemZ_XPLINK64 : CallingConv<[
   // XPLINK64 ABI compliant code widens integral types smaller than i64
   // to i64 before placing the parameters either on the stack or in registers.
   CCIfType<[i32], CCIfExtend<CCPromoteToType<i64>>>,
-  // Promote f32 to f64 and bitcast to i64, if it needs to be passed in GPRs.
-  // Although we assign the f32 vararg to be bitcast, it will first be promoted
-  // to an f64 within convertValVTToLocVT().
-  CCIfType<[f32, f64], CCIfNotFixed<CCBitConvertToType<i64>>>,
+  // Promote f32 to f64 and bitcast to i64, if it needs to be passed in GPRS.
+  CCIfType<[f32], CCIfNotFixed<CCPromoteToType<f64>>>,
+  CCIfType<[f64], CCIfNotFixed<CCBitConvertToType<i64>>>,
   // long double, can only be passed in GPR2 and GPR3, if available,
   // hence R2Q
   CCIfType<[f128], CCIfNotFixed<CCCustom<"CC_XPLINK64_Allocate128BitVararg">>>,

diff  --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index c125ceed3fcbb..0eded62347bee 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -1358,12 +1358,8 @@ static SDValue convertValVTToLocVT(SelectionDAG &DAG, const SDLoc &DL,
     return DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Value);
   case CCValAssign::BCvt: {
     assert(VA.getLocVT() == MVT::i64 || VA.getLocVT() == MVT::i128);
-    assert(VA.getValVT().isVector() || VA.getValVT() == MVT::f32 ||
-           VA.getValVT() == MVT::f64 || VA.getValVT() == MVT::f128);
-    // For an f32 vararg we need to first promote it to an f64 and then
-    // bitcast it to an i64.
-    if (VA.getValVT() == MVT::f32 && VA.getLocVT() == MVT::i64)
-      Value = DAG.getNode(ISD::FP_EXTEND, DL, MVT::f64, Value);
+    assert(VA.getValVT().isVector() || VA.getValVT() == MVT::f64 ||
+           VA.getValVT() == MVT::f128);
     MVT BitCastToType = VA.getValVT().isVector() && VA.getLocVT() == MVT::i64
                             ? MVT::v2i64
                             : VA.getLocVT();

diff  --git a/llvm/test/CodeGen/SystemZ/call-zos-vararg.ll b/llvm/test/CodeGen/SystemZ/call-zos-vararg.ll
index 8e4974c36cadf..2efe27172efcc 100644
--- a/llvm/test/CodeGen/SystemZ/call-zos-vararg.ll
+++ b/llvm/test/CodeGen/SystemZ/call-zos-vararg.ll
@@ -189,30 +189,7 @@ entry:
   ret i64 %retval
 }
 
-; CHECK-LABEL: call_vararg_float0
-; CHECK:       lghi  1, 1
-; CHECK:       llihf 2, 1073692672
-define i64 @call_vararg_float0() {
-entry:
-  %retval = call i64 (i64, ...) @pass_vararg2(i64 1, float 1.953125)
-  ret i64 %retval
-}
-
-; CHECK-LABEL: call_vararg_float1
-; CHECK:       llihf 0, 1073692672
-; CHECK-NEXT:  stg  0, 2200(4)
-; CHECK:       larl  1, @CPI21_0
-; CHECK-NEXT:  le  0, 0(1)
-; CHECK:       llihh 2, 16384
-; CHECK:       llihh 3, 16392
-define i64 @call_vararg_float1() {
-entry:
-  %retval = call i64 (float, ...) @pass_vararg4(float 1.0, float 2.0, float 3.0, float 1.953125)
-  ret i64 %retval
-}
-
 declare i64 @pass_vararg0(i64 %arg0, i64 %arg1, ...)
 declare i64 @pass_vararg1(fp128 %arg0, ...)
 declare i64 @pass_vararg2(i64 %arg0, ...)
 declare i64 @pass_vararg3(...)
-declare i64 @pass_vararg4(float, ...)