[PATCH] D119905: [X86ISelLowering] permit BlockAddressSDNode "i" constraints for PIC

[Nick Desaulniers via Phabricator via llvm-commits]

nickdesaulniers updated this revision to Diff 409096.
nickdesaulniers edited the summary of this revision.
nickdesaulniers added a comment.

- manually format like a peasant


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D119905/new/

https://reviews.llvm.org/D119905

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/X86/asm-block-labels-pic.ll
  llvm/test/CodeGen/X86/asm-block-labels-pic2.ll


Index: llvm/test/CodeGen/X86/asm-block-labels-pic2.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/X86/asm-block-labels-pic2.ll
@@ -0,0 +1,19 @@
+; RUN: not llc --relocation-model=pic %s -o - 2>&1 | FileCheck %s
+target triple = "i386-unknown-linux-gnu"
+
+; The intent of this test is to ensure that we handle blockaddress' correctly
+; with "i" constraints for -m32 -fPIC.
+
+define void @x() {
+entry:
+  br label %overflow
+overflow:
+  ret void
+}
+
+; Test unusual case of blockaddress from @x in @y's asm.
+; CHECK: error: invalid operand for inline asm constraint 'i'
+define void @y() {
+  call void asm "# ${0:l}\0A", "i"(i8* blockaddress(@x, %overflow))
+  ret void
+}
Index: llvm/test/CodeGen/X86/asm-block-labels-pic.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/X86/asm-block-labels-pic.ll
@@ -0,0 +1,28 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --relocation-model=pic %s -o - | FileCheck %s
+target triple = "i386-unknown-linux-gnu"
+
+; The intent of this test is to ensure that we handle blockaddress' correctly
+; with "i" constraints for -m32 -fPIC.
+
+define void @x() {
+; CHECK-LABEL: x:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    #APP
+; CHECK-NEXT:    # .Ltmp0
+; CHECK-EMPTY:
+; CHECK-NEXT:    #NO_APP
+; CHECK-NEXT:  # %bb.2: # %return
+; CHECK-NEXT:    retl
+; CHECK-NEXT:  .Ltmp0: # Block address taken
+; CHECK-NEXT:  .LBB0_1: # %overflow
+; CHECK-NEXT:    retl
+  callbr void asm "#  ${0:l}\0A", "i"(i8* blockaddress(@x, %overflow))
+          to label %return [label %overflow]
+
+overflow:
+  br label %return
+
+return:
+  ret void
+}
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -54789,9 +54789,16 @@
 
     // In any sort of PIC mode addresses need to be computed at runtime by
     // adding in a register or some sort of table lookup.  These can't
-    // be used as immediates.
-    if (Subtarget.isPICStyleGOT() || Subtarget.isPICStyleStubPIC())
-      return;
+    // be used as immediates. BlockAddresses referring to labels in the local
+    // function don't need such lookup.
+    if (Subtarget.isPICStyleGOT() || Subtarget.isPICStyleStubPIC()) {
+      if (auto *BA = dyn_cast<BlockAddressSDNode>(Op)) {
+        if (BA->getBlockAddress()->getFunction() !=
+            &DAG.getMachineFunction().getFunction())
+          return;
+      } else
+        return;
+    }
 
     // If we are in non-pic codegen mode, we allow the address of a global (with
     // an optional displacement) to be used with 'i'.


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