[PATCH] D119399: [MachineSink] Use SkipPHIsAndLabels for sink insertion points
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 14 06:50:16 PST 2022
arsenm added inline comments.
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Comment at: llvm/test/CodeGen/AMDGPU/sink-after-control-flow.mir:2
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -mattr=+wavefrontsize32,-wavefrontsize64 -run-pass=machine-sink -o - %s | FileCheck -check-prefixes=GFX10 %s
+
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The -mattr can be removed, wave32 is the default
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Comment at: llvm/test/CodeGen/AMDGPU/sink-after-control-flow.mir:3
+# RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -mattr=+wavefrontsize32,-wavefrontsize64 -run-pass=machine-sink -o - %s | FileCheck -check-prefixes=GFX10 %s
+
+---
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Add a brief comment explaining the test?
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Comment at: llvm/test/CodeGen/AMDGPU/sink-after-control-flow.mir:122-183
+
+ $exec_lo = S_OR_B32 $exec_lo, %9, implicit-def $scc
+ %10:sreg_32 = S_BFE_U32 %0, 524296, implicit-def dead $scc
+ %11:sreg_32 = V_CMP_GE_U32_e64 %3, killed %10, implicit $exec
+ %12:sreg_32 = S_XOR_B32 %11, -1, implicit-def $scc
+ %13:sreg_32 = S_AND_B32 %12, $exec_lo, implicit-def $scc
+ %14:sreg_32 = S_XOR_B32 $exec_lo, %13, implicit-def $scc
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Can you prune out some of these blocks?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D119399/new/
https://reviews.llvm.org/D119399
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