[PATCH] D119104: [Sparc] Make sure that we really don't emit quad-precision unless the "hard-quad-float" feature is available

Koakuma via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 14 05:13:58 PST 2022


koakuma added a comment.

Looks okay here, in particular it doesn't emit FMOVqcc instructions unless hard-quad-float is specified:

  define fp128 @fpselect(i32 signext %0, fp128 %1, fp128 %2) {
    %a = icmp eq i32 %0, 0
    %b = select i1 %a, fp128 %2, fp128 %1
    ret fp128 %b
  }

Before the patch:

  fpselect:
    fmovd %f4, %f0
    fmovd %f6, %f2
    cmp %o0, 0
    retl
     fmovqe %icc, %f8, %f0

After the patch:

  fpselect:
    cmp %o0, 0
    fmovd %f8, %f0
    fmovd %f10, %f2
    be .LBB0_2
     nop
    fmovd %f4, %f0
    fmovd %f6, %f2
  .LBB0_2:
    retl
     nop

Other instructions seems to not be emitted when in not in hard-quad-float mode, even before the patch, though.
Also, is it possible to add some tests for this?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D119104/new/

https://reviews.llvm.org/D119104



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