[llvm] 9dc43df - [AMDGPU] Fix line endings. NFC.
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 14 01:58:52 PST 2022
Author: Jay Foad
Date: 2022-02-14T09:57:55Z
New Revision: 9dc43dfae6af822e308f83651632c827e57255ea
URL: https://github.com/llvm/llvm-project/commit/9dc43dfae6af822e308f83651632c827e57255ea
DIFF: https://github.com/llvm/llvm-project/commit/9dc43dfae6af822e308f83651632c827e57255ea.diff
LOG: [AMDGPU] Fix line endings. NFC.
Added:
Modified:
llvm/test/CodeGen/AMDGPU/divergence-driven-ctpop.ll
llvm/test/CodeGen/AMDGPU/divergence-driven-xnor.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AMDGPU/divergence-driven-ctpop.ll b/llvm/test/CodeGen/AMDGPU/divergence-driven-ctpop.ll
index 1ed3f4485a12f..80dc4e16c0b67 100644
--- a/llvm/test/CodeGen/AMDGPU/divergence-driven-ctpop.ll
+++ b/llvm/test/CodeGen/AMDGPU/divergence-driven-ctpop.ll
@@ -1,53 +1,53 @@
-; RUN: llc -march=amdgcn -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GCN %s
-
-; GCN-LABEL: name: s_ctpop_i32
-; GCN: S_BCNT1_I32_B32
-define amdgpu_kernel void @s_ctpop_i32(i32 addrspace(1)* noalias %out, i32 %val) nounwind {
- %ctpop = call i32 @llvm.ctpop.i32(i32 %val) nounwind readnone
- store i32 %ctpop, i32 addrspace(1)* %out, align 4
- ret void
-}
-
-; GCN-LABEL: name: s_ctpop_i64
-; GCN: %[[BCNT:[0-9]+]]:sreg_32 = S_BCNT1_I32_B64
-; GCN: %[[SREG1:[0-9]+]]:sreg_32 = COPY %[[BCNT]]
-; GCN: %[[SREG2:[0-9]+]]:sreg_32 = S_MOV_B32 0
-; GCN: REG_SEQUENCE killed %[[SREG1]], %subreg.sub0, killed %[[SREG2]], %subreg.sub1
-define amdgpu_kernel void @s_ctpop_i64(i32 addrspace(1)* noalias %out, i64 %val) nounwind {
- %ctpop = call i64 @llvm.ctpop.i64(i64 %val) nounwind readnone
- %truncctpop = trunc i64 %ctpop to i32
- store i32 %truncctpop, i32 addrspace(1)* %out, align 4
- ret void
-}
-
-; GCN-LABEL: name: v_ctpop_i32
-; GCN: V_BCNT_U32_B32_e64
-define amdgpu_kernel void @v_ctpop_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in) nounwind {
- %tid = call i32 @llvm.amdgcn.workitem.id.x()
- %in.gep = getelementptr i32, i32 addrspace(1)* %in, i32 %tid
- %val = load i32, i32 addrspace(1)* %in.gep, align 4
- %ctpop = call i32 @llvm.ctpop.i32(i32 %val) nounwind readnone
- store i32 %ctpop, i32 addrspace(1)* %out, align 4
- ret void
-}
-
-; GCN-LABEL: name: v_ctpop_i64
-; GCN: %[[BCNT1:[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e64 killed %{{[0-9]+}}, 0, implicit $exec
-; GCN: %[[BCNT2:[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e64 killed %{{[0-9]+}}, killed %[[BCNT1]], implicit $exec
-; GCN: %[[VGPR1:[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
-; GCN: REG_SEQUENCE killed %[[BCNT2]], %subreg.sub0, killed %[[VGPR1]], %subreg.sub1
-define amdgpu_kernel void @v_ctpop_i64(i32 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind {
- %tid = call i32 @llvm.amdgcn.workitem.id.x()
- %in.gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
- %val = load i64, i64 addrspace(1)* %in.gep, align 8
- %ctpop = call i64 @llvm.ctpop.i64(i64 %val) nounwind readnone
- %truncctpop = trunc i64 %ctpop to i32
- store i32 %truncctpop, i32 addrspace(1)* %out, align 4
- ret void
-}
-
-declare i64 @llvm.ctpop.i64(i64) nounwind readnone
-
-declare i32 @llvm.ctpop.i32(i32) nounwind readnone
-
-declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
+; RUN: llc -march=amdgcn -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GCN %s
+
+; GCN-LABEL: name: s_ctpop_i32
+; GCN: S_BCNT1_I32_B32
+define amdgpu_kernel void @s_ctpop_i32(i32 addrspace(1)* noalias %out, i32 %val) nounwind {
+ %ctpop = call i32 @llvm.ctpop.i32(i32 %val) nounwind readnone
+ store i32 %ctpop, i32 addrspace(1)* %out, align 4
+ ret void
+}
+
+; GCN-LABEL: name: s_ctpop_i64
+; GCN: %[[BCNT:[0-9]+]]:sreg_32 = S_BCNT1_I32_B64
+; GCN: %[[SREG1:[0-9]+]]:sreg_32 = COPY %[[BCNT]]
+; GCN: %[[SREG2:[0-9]+]]:sreg_32 = S_MOV_B32 0
+; GCN: REG_SEQUENCE killed %[[SREG1]], %subreg.sub0, killed %[[SREG2]], %subreg.sub1
+define amdgpu_kernel void @s_ctpop_i64(i32 addrspace(1)* noalias %out, i64 %val) nounwind {
+ %ctpop = call i64 @llvm.ctpop.i64(i64 %val) nounwind readnone
+ %truncctpop = trunc i64 %ctpop to i32
+ store i32 %truncctpop, i32 addrspace(1)* %out, align 4
+ ret void
+}
+
+; GCN-LABEL: name: v_ctpop_i32
+; GCN: V_BCNT_U32_B32_e64
+define amdgpu_kernel void @v_ctpop_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in) nounwind {
+ %tid = call i32 @llvm.amdgcn.workitem.id.x()
+ %in.gep = getelementptr i32, i32 addrspace(1)* %in, i32 %tid
+ %val = load i32, i32 addrspace(1)* %in.gep, align 4
+ %ctpop = call i32 @llvm.ctpop.i32(i32 %val) nounwind readnone
+ store i32 %ctpop, i32 addrspace(1)* %out, align 4
+ ret void
+}
+
+; GCN-LABEL: name: v_ctpop_i64
+; GCN: %[[BCNT1:[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e64 killed %{{[0-9]+}}, 0, implicit $exec
+; GCN: %[[BCNT2:[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e64 killed %{{[0-9]+}}, killed %[[BCNT1]], implicit $exec
+; GCN: %[[VGPR1:[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+; GCN: REG_SEQUENCE killed %[[BCNT2]], %subreg.sub0, killed %[[VGPR1]], %subreg.sub1
+define amdgpu_kernel void @v_ctpop_i64(i32 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind {
+ %tid = call i32 @llvm.amdgcn.workitem.id.x()
+ %in.gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
+ %val = load i64, i64 addrspace(1)* %in.gep, align 8
+ %ctpop = call i64 @llvm.ctpop.i64(i64 %val) nounwind readnone
+ %truncctpop = trunc i64 %ctpop to i32
+ store i32 %truncctpop, i32 addrspace(1)* %out, align 4
+ ret void
+}
+
+declare i64 @llvm.ctpop.i64(i64) nounwind readnone
+
+declare i32 @llvm.ctpop.i32(i32) nounwind readnone
+
+declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
diff --git a/llvm/test/CodeGen/AMDGPU/divergence-driven-xnor.ll b/llvm/test/CodeGen/AMDGPU/divergence-driven-xnor.ll
index ec5979c119835..8eae37ea0be1a 100644
--- a/llvm/test/CodeGen/AMDGPU/divergence-driven-xnor.ll
+++ b/llvm/test/CodeGen/AMDGPU/divergence-driven-xnor.ll
@@ -1,44 +1,44 @@
-; RUN: llc -march=amdgcn -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GCN %s
-; RUN: llc -march=amdgcn -mcpu=gfx906 -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GCN_DL %s
-
-; GCN-LABEL: name: uniform_xnor_i64
-; GCN: S_XNOR_B64
-define amdgpu_kernel void @uniform_xnor_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) {
- %xor = xor i64 %a, %b
- %res = xor i64 %xor, -1
- store i64 %res, i64 addrspace(1)* %out
- ret void
-}
-; GCN-LABEL: name: divergent_xnor_i64
-; GCN: V_XOR_B32_e64
-; GCN: V_XOR_B32_e64
-; GCN: V_NOT_B32_e32
-; GCN: V_NOT_B32_e32
-; GCN_DL: V_XNOR_B32_e64
-; GCN_DL: V_XNOR_B32_e64
-define i64 @divergent_xnor_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) {
- %xor = xor i64 %a, %b
- %res = xor i64 %xor, -1
- ret i64 %res
-}
-
-; GCN-LABEL: name: uniform_xnor_i32
-; GCN: S_XNOR_B32
-define amdgpu_kernel void @uniform_xnor_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
- %xor = xor i32 %a, %b
- %res = xor i32 %xor, -1
- store i32 %res, i32 addrspace(1)* %out
- ret void
-}
-
-; GCN-LABEL: name: divergent_xnor_i32
-; GCN: V_XOR_B32_e64
-; GCN: V_NOT_B32_e32
-; GCN_DL: V_XNOR_B32_e64
-define i32 @divergent_xnor_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
- %xor = xor i32 %a, %b
- %res = xor i32 %xor, -1
- ret i32 %res
-}
-
-declare i32 @llvm.amdgcn.workitem.id.x() #0
+; RUN: llc -march=amdgcn -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GCN %s
+; RUN: llc -march=amdgcn -mcpu=gfx906 -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GCN_DL %s
+
+; GCN-LABEL: name: uniform_xnor_i64
+; GCN: S_XNOR_B64
+define amdgpu_kernel void @uniform_xnor_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) {
+ %xor = xor i64 %a, %b
+ %res = xor i64 %xor, -1
+ store i64 %res, i64 addrspace(1)* %out
+ ret void
+}
+; GCN-LABEL: name: divergent_xnor_i64
+; GCN: V_XOR_B32_e64
+; GCN: V_XOR_B32_e64
+; GCN: V_NOT_B32_e32
+; GCN: V_NOT_B32_e32
+; GCN_DL: V_XNOR_B32_e64
+; GCN_DL: V_XNOR_B32_e64
+define i64 @divergent_xnor_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) {
+ %xor = xor i64 %a, %b
+ %res = xor i64 %xor, -1
+ ret i64 %res
+}
+
+; GCN-LABEL: name: uniform_xnor_i32
+; GCN: S_XNOR_B32
+define amdgpu_kernel void @uniform_xnor_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
+ %xor = xor i32 %a, %b
+ %res = xor i32 %xor, -1
+ store i32 %res, i32 addrspace(1)* %out
+ ret void
+}
+
+; GCN-LABEL: name: divergent_xnor_i32
+; GCN: V_XOR_B32_e64
+; GCN: V_NOT_B32_e32
+; GCN_DL: V_XNOR_B32_e64
+define i32 @divergent_xnor_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
+ %xor = xor i32 %a, %b
+ %res = xor i32 %xor, -1
+ ret i32 %res
+}
+
+declare i32 @llvm.amdgcn.workitem.id.x() #0
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