[PATCH] D117426: [AVR] Only push and clear R1 in interrupts when necessary

Ben Shi via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 14 01:17:02 PST 2022


benshi001 added inline comments.


================
Comment at: llvm/lib/Target/AVR/AVRISelLowering.cpp:821
 
+// Modify the existing ISD::INLINEASM node to add the implicit register r1.
+SDValue AVRTargetLowering::LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const {
----------------
aykevl wrote:
> This is a bit of a hack, but I couldn't think of a better way.
I think this way is OK enough.


================
Comment at: llvm/lib/Target/AVR/AVRISelLowering.cpp:835
+  // there):
+  //  - The flags of the operand (input operand, one register).
+  //  - The register itself.
----------------
`The flag of the implicit R1 register operand` is better.


================
Comment at: llvm/lib/Target/AVR/AVRISelLowering.cpp:836
+  //  - The flags of the operand (input operand, one register).
+  //  - The register itself.
+  SDLoc dl(Op);
----------------
`the implicit R1 register operand itself.`


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117426/new/

https://reviews.llvm.org/D117426



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