[PATCH] D119105: [DAGCombiner][AArch64] Enhance to fold CSNEG into CSINC instruction
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 14 00:56:21 PST 2022
dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.
Thanks, LGTM with a couple of suggestions.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:14893
+ int64_t C = -1 * CFVal->getSExtValue();
+ CTVal = cast<ConstantSDNode>(DAG.getConstant(C, DL, VT));
+ CFVal = cast<ConstantSDNode>(DAG.getConstant(-1, DL, VT));
----------------
Probably better to avoid the uint64_t and use APInt directly.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:14894
+ CTVal = cast<ConstantSDNode>(DAG.getConstant(C, DL, VT));
+ CFVal = cast<ConstantSDNode>(DAG.getConstant(-1, DL, VT));
+ AArch64CC = AArch64CC::getInvertedCondCode(AArch64CC);
----------------
This can use DAG.getAllOnesConstant(..)
================
Comment at: llvm/test/CodeGen/AArch64/aarch64-isel-csinc.ll:132
+; int csinc9 (int a, int b) { return a ? b+1 : b-1; }
+define dso_local i32 @csinc9(i32 %a, i32 %b) {
+; CHECK-LABEL: csinc9:
----------------
Can you add i64 variants of these tests, maybe with different conditions? You can also remove the dso_local.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D119105/new/
https://reviews.llvm.org/D119105
More information about the llvm-commits
mailing list