[PATCH] D117253: [AMDGPU] Select VGPR versions of MFMA if possible

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 7 17:13:30 PST 2022


arsenm accepted this revision.
arsenm added inline comments.
This revision is now accepted and ready to land.


================
Comment at: llvm/lib/Target/AMDGPU/VOP3PInstructions.td:448
+class AgprMAIFrag<SDPatternOperator Op> :
+  MAIFrag<Op, [{ return MF->getInfo<SIMachineFunctionInfo>()->mayNeedAGPRs(); }]>;
+
----------------
rampitec wrote:
> arsenm wrote:
> > rampitec wrote:
> > > arsenm wrote:
> > > > The point of checking it here is you don't need to inspect the original IR. You can check if there are any AGPR uses in the machine function
> > > This is selection, there MF is not yet selected. Plus it needs a check for calls.
> > We know if there are calls at selection time already, and have already lowered all asm and should have seen the AGPRs already
> In fact we don't. As discussed offline we only know it for current bb. This test will fail:
> 
> ```
> declare <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float, float, <32 x float>, i32, i32, i32)
> 
> define amdgpu_kernel void @test_mfma_f32_32x32x1f32_call(<32 x float> addrspace(1)* %arg) #0 {
> bb1:
>   %in.1 = load <32 x float>, <32 x float> addrspace(1)* %arg
>   %mai.1 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %in.1, i32 1, i32 2, i32 3)
>   store <32 x float> %mai.1, <32 x float> addrspace(1)* %arg
>   br label %bb2
> 
> bb2:
>   call void @foo()
>   ret void
> }
> 
> declare void @foo()
> 
> attributes #0 = { "amdgpu-flat-work-group-size"="1,256" "amdgpu-waves-per-eu"="2" }
> ```
Add this test for future reference? Probably should make it a conditional branch 


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117253/new/

https://reviews.llvm.org/D117253



More information about the llvm-commits mailing list