[PATCH] D119654: [SDAG] enable binop identity constant folds for add/sub

LuoYuanke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Feb 13 18:41:51 PST 2022


LuoYuanke added inline comments.


================
Comment at: llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll:4241
+; X86-NEXT:    vpaddq %zmm0, %zmm1, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xf5,0x49,0xd4,0xc8]
+; X86-NEXT:    vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
 ; X86-NEXT:    retl ## encoding: [0xc3]
----------------
LuoYuanke wrote:
> This vmovdqa64 is emitted because the function need to return value by zmm0. Not sure if it is a regression.
It seems fold select to its previous operands (psrl) is better, because the add operands is communitive so there is more chance to meet the hint (return register) of register allocator.


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  https://reviews.llvm.org/D119654/new/

https://reviews.llvm.org/D119654



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