[PATCH] D119629: [DAG] computeKnownBits - add ISD::AVGCEILU handling

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:3138-3139
+    KnownBits One = KnownBits::makeConstant(APInt(BitWidth + 1, 1));
+    Known = KnownBits::computeForAddSub(true, false, Known, Known2);
+    Known = KnownBits::computeForAddSub(true, false, Known, One);
+    Known = Known.extractBits(BitWidth, 1);
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I think you could do all of this with a single call to computeForAddCarry with carry-in known to be 1.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D119629/new/

https://reviews.llvm.org/D119629