[PATCH] D119629: [DAG] computeKnownBits - add ISD::AVGCEILU handling

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:3135
+    Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
+    Known = Known.zext(BitWidth * 2);
+    Known2 = Known2.zext(BitWidth * 2);
----------------
foad wrote:
> BitWidth+1 is enough.
Yeah - I went back and forth on BW+1 and BW+2, but I believe +1 is enough. The docs may still say +2 because I was being too safe.

Somewhat relatedly, 0xf+0xf+1 = 0x1f. So avgflooru and avgceilu may both only require one computeForAddSub call, and could possible share the same code.

(This seems to says that 1 bit is enough for any +C: https://alive2.llvm.org/ce/z/e6PMYq. Not sure how to prove known bits more generally).


Repository:
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  https://reviews.llvm.org/D119629/new/

https://reviews.llvm.org/D119629