[llvm] 22e69af - [MachineRegisterInfo] Simplify code so it matches the description
Benjamin Kramer via llvm-commits
llvm-commits at lists.llvm.org
Sat Feb 12 08:47:45 PST 2022
Author: Benjamin Kramer
Date: 2022-02-12T17:46:12+01:00
New Revision: 22e69afa3b1dd9e6c77d3a75a77f6f4094e77a26
URL: https://github.com/llvm/llvm-project/commit/22e69afa3b1dd9e6c77d3a75a77f6f4094e77a26
DIFF: https://github.com/llvm/llvm-project/commit/22e69afa3b1dd9e6c77d3a75a77f6f4094e77a26.diff
LOG: [MachineRegisterInfo] Simplify code so it matches the description
Added:
Modified:
llvm/include/llvm/CodeGen/MachineRegisterInfo.h
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
index 2d34cd6a1660e..d3b29081da6fa 100644
--- a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
@@ -835,23 +835,12 @@ class MachineRegisterInfo {
/// to refer to the designated register.
void updateDbgUsersToReg(MCRegister OldReg, MCRegister NewReg,
ArrayRef<MachineInstr *> Users) const {
- SmallSet<MCRegister, 4> OldRegUnits;
- for (MCRegUnitIterator RUI(OldReg, getTargetRegisterInfo()); RUI.isValid();
- ++RUI)
- OldRegUnits.insert(*RUI);
-
// If this operand is a register, check whether it overlaps with OldReg.
// If it does, replace with NewReg.
- auto UpdateOp = [this, &NewReg, &OldReg, &OldRegUnits](MachineOperand &Op) {
- if (Op.isReg()) {
- for (MCRegUnitIterator RUI(OldReg, getTargetRegisterInfo());
- RUI.isValid(); ++RUI) {
- if (OldRegUnits.contains(*RUI)) {
- Op.setReg(NewReg);
- break;
- }
- }
- }
+ auto UpdateOp = [this, &NewReg, &OldReg](MachineOperand &Op) {
+ if (Op.isReg() &&
+ getTargetRegisterInfo()->regsOverlap(Op.getReg(), OldReg))
+ Op.setReg(NewReg);
};
// Iterate through (possibly several) operands to DBG_VALUEs and update
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