[PATCH] D119115: [RISCV] Improve insert_vector_elt for fixed mask registers.

[Jianjian Guan via Phabricator via llvm-commits]

jacquesguan updated this revision to Diff 407749.
jacquesguan added a comment.

refactor the bit manipulation


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D119115/new/

https://reviews.llvm.org/D119115

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll

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