[PATCH] D116602: [SVE][CodeGen] Bail out for scalable vectors in AArch64TargetLowering::ReconstructShuffle

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 10 04:31:57 PST 2022


sdesmalen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:8989
     else if (V.getOpcode() != ISD::EXTRACT_VECTOR_ELT ||
              !isa<ConstantSDNode>(V.getOperand(1))) {
       LLVM_DEBUG(
----------------
You can bail out sooner I think, by adding a `|| V.getOperand(0).getValueType().isScalableVectorType()` here.


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  https://reviews.llvm.org/D116602/new/

https://reviews.llvm.org/D116602



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