[PATCH] D119399: [MachineSink] Allow target to adjust sink insertion point

[Carl Ritson via Phabricator via llvm-commits]

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For AMDGPU the insertion point for a block may not be the first
non-PHI instruction.  This happens when a block contains EXEC mask
manipulation related to control flow (converging lanes).

Allow the target to adjust the insertion point used by the
MachineSink pass.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D119399

Files:
  llvm/include/llvm/CodeGen/TargetInstrInfo.h
  llvm/lib/CodeGen/MachineSink.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.h
  llvm/test/CodeGen/AMDGPU/sink-after-control-flow.mir

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