[PATCH] D117451: [MCA] Proposing the InstrPostProcess:modifyInstrDesc() method.

[Patrick Holland via Phabricator via llvm-commits]

holland11 added a comment.

In D117451#3307468 <https://reviews.llvm.org/D117451#3307468>, @andreadb wrote:

> Hey Patrick,
>
> Are there any updates on this patch?

Yes, sorry about the delay. I've been meaning to come here to ask for your input on how to go about restricting the API.

  bool Modified = IPP.modifyInstrDesc(*ID, MCI);

This is the current way that IPP gets access to modifying the InstrDesc. This isn't ideal because it gives IPP the ability to modify anything that they want.

As a reminder, here is the InstrDesc struct:

  /// An instruction descriptor
  struct InstrDesc {
    SmallVector<WriteDescriptor, 2> Writes; // Implicit writes are at the end.
    SmallVector<ReadDescriptor, 4> Reads;   // Implicit reads are at the end.
  
    // For every resource used by an instruction of this kind, this vector
    // reports the number of "consumed cycles".
    SmallVector<std::pair<uint64_t, ResourceUsage>, 4> Resources;
  
    // A bitmask of used hardware buffers.
    uint64_t UsedBuffers;
  
    // A bitmask of used processor resource units.
    uint64_t UsedProcResUnits;
  
    // A bitmask of implicit uses of processor resource units.
    uint64_t ImplicitlyUsedProcResUnits;
  
    // A bitmask of used processor resource groups.
    uint64_t UsedProcResGroups;
  
    unsigned MaxLatency;
    // Number of MicroOps for this instruction.
    unsigned NumMicroOps;
    // SchedClassID used to construct this InstrDesc.
    // This information is currently used by views to do fast queries on the
    // subtarget when computing the reciprocal throughput.
    unsigned SchedClassID;
  
    unsigned MayLoad : 1;
    unsigned MayStore : 1;
    unsigned HasSideEffects : 1;
    unsigned BeginGroup : 1;
    unsigned EndGroup : 1;
    unsigned RetireOOO : 1;
  
    // True if all buffered resources are in-order, and there is at least one
    // buffer which is a dispatch hazard (BufferSize = 0).
    unsigned MustIssueImmediately : 1;
  
    // A zero latency instruction doesn't consume any scheduler resources.
    bool isZeroLatency() const { return !MaxLatency && Resources.empty(); }
  
    InstrDesc() = default;
    InstrDesc(const InstrDesc &Other) = delete;
    InstrDesc &operator=(const InstrDesc &Other) = delete;
  };

What I'd like to do is make it so that IPP has the ability to modify everything except the `Writes` and `Reads` vectors. Ideally, the `WriteDescriptor` and `ReadDescriptor` classes would have a new attribute (`Ignored`) that can be set to `true` by IPP, but that would be the only thing that IPP could do to those vectors.

I can think of several ways to achieve the above, but none of it is particularly elegant. Do you have any ideas?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D117451/new/

https://reviews.llvm.org/D117451