[PATCH] D92695: [X86ISelLowering] don't emit frame pointers for eflags intrinsics.

[Nick Desaulniers via Phabricator via llvm-commits]

nickdesaulniers updated this revision to Diff 407219.
nickdesaulniers added a comment.

- rebase, check for wincfi


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D92695/new/

https://reviews.llvm.org/D92695

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86Subtarget.h
  llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll
  llvm/test/CodeGen/X86/x86-flags-intrinsics.ll


Index: llvm/test/CodeGen/X86/x86-flags-intrinsics.ll
===================================================================
--- llvm/test/CodeGen/X86/x86-flags-intrinsics.ll
+++ llvm/test/CodeGen/X86/x86-flags-intrinsics.ll
@@ -11,11 +11,8 @@
 }
 
 ; CHECK-LABEL: _read_flags:
-; CHECK:      pushl   %ebp
-; CHECK-NEXT: movl    %esp, %ebp
-; CHECK-NEXT: pushfl
+; CHECK:      pushfl
 ; CHECK-NEXT: popl    %eax
-; CHECK-NEXT: popl    %ebp
 
 define x86_fastcallcc void @write_flags(i32 inreg %arg) {
 entry:
@@ -24,8 +21,5 @@
 }
 
 ; CHECK-LABEL: @write_flags at 4:
-; CHECK:      pushl   %ebp
-; CHECK-NEXT: movl    %esp, %ebp
-; CHECK-NEXT: pushl   %ecx
+; CHECK:      pushl   %ecx
 ; CHECK-NEXT: popfl
-; CHECK-NEXT: popl    %ebp
Index: llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll
===================================================================
--- llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll
+++ llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll
@@ -11,14 +11,8 @@
 }
 
 ; CHECK-LABEL: read_flags:
-; CHECK:      pushq   %rbp
-; CHECK:      .seh_pushreg %rbp
-; CHECK:      movq    %rsp, %rbp
-; CHECK:      .seh_setframe %rbp, 0
-; CHECK:      .seh_endprologue
-; CHECK-NEXT: pushfq
+; CHECK:      pushfq
 ; CHECK-NEXT: popq    %rax
-; CHECK-NEXT: popq    %rbp
 
 define void @write_flags(i64 %arg) {
 entry:
@@ -27,11 +21,5 @@
 }
 
 ; CHECK-LABEL: write_flags:
-; CHECK:      pushq   %rbp
-; CHECK:      .seh_pushreg %rbp
-; CHECK:      movq    %rsp, %rbp
-; CHECK:      .seh_setframe %rbp, 0
-; CHECK:      .seh_endprologue
-; CHECK-NEXT: pushq   %rcx
+; CHECK:      pushq   %rcx
 ; CHECK-NEXT: popfq
-; CHECK-NEXT: popq    %rbp
Index: llvm/lib/Target/X86/X86Subtarget.h
===================================================================
--- llvm/lib/Target/X86/X86Subtarget.h
+++ llvm/lib/Target/X86/X86Subtarget.h
@@ -637,6 +637,7 @@
 
   PICStyles::Style getPICStyle() const { return PICStyle; }
   void setPICStyle(PICStyles::Style Style)  { PICStyle = Style; }
+  const TargetMachine &getTargetMachine() const { return TM; }
 
   bool hasX87() const { return HasX87; }
   bool hasCmpxchg8b() const { return HasCmpxchg8b; }
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -27264,8 +27264,10 @@
     case llvm::Intrinsic::x86_flags_write_u64: {
       // We need a frame pointer because this will get lowered to a PUSH/POP
       // sequence.
-      MachineFrameInfo &MFI = DAG.getMachineFunction().getFrameInfo();
-      MFI.setHasCopyImplyingStackAdjustment(true);
+      if(Subtarget.getTargetMachine().getMCAsmInfo()->usesWindowsCFI()) {
+        MachineFrameInfo &MFI = DAG.getMachineFunction().getFrameInfo();
+        MFI.setHasCopyImplyingStackAdjustment(true);
+      }
       // Don't do anything here, we will expand these intrinsics out later
       // during FinalizeISel in EmitInstrWithCustomInserter.
       return Op;


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