[PATCH] D117989: [RISCV] Add the passthru operand for RVV nomask binary intrinsics.
Zakk Chen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 9 06:59:30 PST 2022
khchen updated this revision to Diff 407151.
khchen added a comment.
address Craig's comments.
1. Add masked vslide test to test policy operand.
2. The masked VLSIDE1 would only emit mask undisturbed policy regardless of giving
mask agnostic policy until InsertVSETVLI supports mask agnostic.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D117989/new/
https://reviews.llvm.org/D117989
Files:
clang/include/clang/Basic/riscv_vector.td
clang/utils/TableGen/RISCVVEmitter.cpp
llvm/include/llvm/IR/IntrinsicsRISCV.td
llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.h
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
llvm/test/CodeGen/RISCV/rvv/masked-vslide1down-rv32.ll
llvm/test/CodeGen/RISCV/rvv/unmasked-tu.ll
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