[PATCH] D119327: [SVE] Prefer zero-extending loads when lowering ISD::EXTLOAD.

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm created this revision.
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The decision is perhaps arbitrary but I figure zeroing has no
dependency on the value being loaded.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D119327

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/test/CodeGen/AArch64/sve-fixed-length-fp-extend-trunc.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-mask-opt.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
  llvm/test/CodeGen/AArch64/sve-gather-scatter-addr-opts.ll
  llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll
  llvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll
  llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll
  llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-reg.ll
  llvm/test/CodeGen/AArch64/sve-split-load.ll

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